This invention is related to the field of error detection and correction systems. In such systems a redundant check character is added to a data stream at the source as an aid to the receiving device to detect and correct errors in the transmission system. Fundamental to such systems is the process by which a known mathematical relationship in the form of a polynomial is transformed into the given redundant check code which is inserted into the data stream. Generally, this process is performed using a cyclic shift technique wherein the data and a residue check character are half added together and certain bits are inverted to form a new residue check code. The process is repeated until all data bits in the data stream have been processed. The final residue check code then becomes the check code added to the data stream. This invention is a device for generating the check codes to be added to the data stream in such a system.
Significant in the prior art known to applicant is U.S. Pat. No. 3,811,108 showing an error code generating device which may be used for reverse error identification. The present invention differs from that shown in the patent to the extent that it may be adjustable for data fields of different lengths in both the forward and reverse directions whereas the patent shows a device which is reversible with a standard length data field. Further, the present invention differs from the device shown in the patent in the way in which the generator polynomial may be entered and altered at will thus making it programmable. U.S. Pat. No. 4,001,779 shows an error correcting system which requires an extra shift in the presence of a code word containing all zeros which is not necessary in the present invention. Other relevant United States patents known to applicant are: U.S. Pat. Nos. 3,678,469; 3,866,170; 3,703,705 and 3,872,430.